This application claims benefit of Japanese Patent Application No. 2000-030151 filed on Feb. 8, 2000, the contents of which are incorporated by the reference.
The present invention relates to radio receivers for portable telephone sets or the like having input power level display for detecting and displaying input power level in such sets, and also to methods of such input power level display.
Radio receivers for receiving radio waves find extensive applications due to their relatively broad service area coverage and relatively inexpensive cost. Portable telephone sets are typical example of such radio receivers. For communication, portable telephone sets receive radio waves from one or more relay stations provided in such service area or areas. However, the distance of a portable telephone set from a relay station or the transmission (output) and receipt (input) wave power levels in the set is not constant. For example, the input or receipt power level of wave varies greatly depending on various conditions.
Such a portable telephone set (or radio communication set) accordingly has a function of detecting the input power level and displays the detected level on a input power level display. In a usual input power level display, a voltage corresponding to the input power level is detected by using a circuit for converting the input power level to a corresponding voltage, for instance, a current drive log amplifier (or logarithmic amplifier). The receiver circuit is controlled on the basis of the detected voltage of the log amplifier. A method of such display control, is an analog display control or adjustment method, in which a control circuit constituted by an analog circuit having an operational amplifier or the like, is used such that the gain and/or off-set voltage of the operational amplifier is controlled while monitoring the voltage corresponding to the input power level. Another type of display control or adjust method is a digital display control method, in which the display is controlled on the basis of the data obtained form an A/D (analog-to-digital) converter without any analog control circuit. Generally, when the input power level is high, i.e., at high input power level electric field, characteristics of an intermediate frequency amplifier (i.e., IF amplifier), a mixer, etc. are subject to distortions due to the characteristics of circuit elements up to input power level conversion to corresponding voltage. Also, IF filter employed has such band characteristics as to have adverse effects of giving rise to a correct input power level display failure trend with an input electric field level even in excess of a certain level. However, the detected input power level display adjustment should be executed such that linearity is obtainable in a certain prescribed input electric field level range. As prior art technique example, Japanese Patent Laid-Open No. 11-55138 discloses xe2x80x9cReceiverxe2x80x9d. In this example, a received signal processing circuit that is used includes a variable attenuator. The variable attenuator is adapted to maintain linearity by increasing the attenuation at high input power level electric field reception time.
FIG. 5 is a block diagram showing the construction of a usual radio receiver. This radio receiver comprises a radio frequency/intermediate frequency (RF/IF) circuit 1 connected to an antenna (or antenna terminal) 20 for receiving radio wave, a log amplifier 2, a voltage converter 3, an A/D converter 4, an operational circuit 5, a memory A6, a B7, a C8, a controller 9, a detected input power level display 10 and an interface (I/F) 11. The RF/IF 1 amplifies an RF signal from the antenna 20, frequency converts the amplified signal to an i-f signal and further amplifies the IF signal with a predetermined gain. The log amplifier 2 executes logarithmic number to real number conversion to permit wide range input signal processing. The voltage converter 3 obtains a voltage corresponding to the output of the log amplifier 2. The A/D converter 4 converts the analog output voltage of the voltage converter 3 to a corresponding digital value. The operational circuit 5 executes operation to be described later on the basis of the digital output of the A/D converter 4. The memories A6, B7 and C8 serve to store the result of operation in the operational circuit 5. The controller 9 controls the operational circuit 5 and the memories A6 to C8. The detected input power level display 10 displays input power level, etc. The I/F 11 serves as interface with a personal computer (PC) or like external circuit.
Two electric fields A and B at different levels are inputted from the antenna 20. The A/D converter 4 digitally converts the input power levels of the two electric fields to digital values. The operational circuit 5 executes an operation of solving simultaneous equations according to the input digital values and prepares an input power level conversion table of digital values versus detected input power level display values. As is well-konown, this level conversion table is made according to the linear equation. In the linear equation, the input electric field E is expressed by the linear equation and is obtained by multiplying the digital value AD of the input electric field by a constant (gain G) and adding an off-set value OFF to the multiplied result as showm in the following:
E=AD*G+OFF 
Thus, if two sets of electric field values and the corresponding digital values are provided, the gain G and off-set OFF are obtained by solving the simultaneous equations. For the display adjustment (control), the levels of the electric fields A and B and also the corresponding digital values are stored in the memories A6 and B7, respectively, and the operational circuit 5 prepares the input power level conversion table according to the values stored in the memories A6 and B7. The table thus prepared is stored in the memory C8. After the adjustment, the digital values are subject to changes with the electric field levels inputted from the antenna 20. Accordingly, a pertinent detected input power level display value corresponding to the level of the inputted electric field is selected with reference to the table in the memory C8, and is displayed on the detected input power level display 10.
FIG. 6 is a flow chart illustrating the display level adjustment process in the prior art radio receiver as described above. In the process, a check is first executed as to whether the display level is to be adjusted (step T1). When adjusting the display level, the input power level of received electric field A is inputted from the I/F 11 (step T2), and is stored in the memory A6 (step T3). Then, the input power level of received electric field B is inputted from the I/F 11 (step T4), and is stored in the memory B7 (step T5). The received electric field A is then inputted from the antenna 20 (step T6). The operational circuit 5 then reads out the digital value (AAD) corresponding to the received electroc field A (step T7), and stores this value AAD in the memory A6 (step T8). Then, the received electric field B is inputted from the antenna 20 (step T9). The operational circuit 5 then reads out the digital value (BAD) corresponding to the received electric field B (step T10), and stores this value BAD in the memory B7 (step T11). The operational circuit 5 then solves the simultaneous equations using the levels of the received fields A and B and the corresponding digital values AAD and BAD, and computes linear gain and off-set satisfying the conditions thus obtained (step T12). Reception power level display values in 1:1 correspondence to all digital values, are then calculated from the gain and off-set data obtained in the operational circuit 5, and table data of the calculated input power level display values corresponding to the digital values are prepared (step T13), and are stored in the memory C8 (step 14).
When it is not decided in the above step T1 that the display level adjustment is to be executed, or after the step T14, a check is done as to whether input power level detection is to be requested (step T15). When requesting the input power level detection (Y), the operational circuit 5 reads out the digital values corresponding to the electric field levels at this time (step T16). When not requesting the input power level detection (N), the process returns to the step T1. Subsequent to the step S16, the input power level display values coincident with the read-out digital values are selected by accessing the memory C8 (step T17). Finally, the controller 9 causes display of the pertinent input power levels on the detected input power level display 10 (step T18), and then the process goes back to the step T15.
In the above prior art technique, however, the circuit for converting input power level to voltage processes input power levels in a wide range likewise as the voltage data. Therefore, level division is executed on CPU side, and a variable attenuator and a controller for controlling such variable attenuator should be provided. Besides, an interface for receiving the voltage data and feeding out the variable attenuator control data is necessary, causing complexity of circuit construction and control. Furthermore, the prior art technique described above with reference to FIGS. 5 and 6 poses a problem that sufficient linearity for the input power level display cannot be obtained.
An object of the present invention is to provide a radio receiver having sufficient linearity for the input power level display to be obtained at the high input power level electric field without any complication of the circuit construction and a method of the display level adjustinment.
According to an aspect of the present invention, there is provided a radio receiver, in which a input power level detected by an analog-to-digital converter for digitally converting a voltage from a voltage converter for converting a signal received from an antenna is displayed on a input power level display, comprising: a memory circuit for storing digital values AAD, BAD and CAD from the analog-to-digital converter when electric fields A, B and C, respectively, are received from the antenna; an operational circuit for obtaining a non-linearity corrected input power level conversion table by calculating input power levels from the digital values; a table memory circuit for storing the input power level conversion table; and a controller for displaying the input power level at the time of reception of each electric field by reading out the input power level conversion table in the table memory circuit.
The electric field C is a saturation starting point in the receiver circuit at high input power level electric field input time. The electric field C is a low input power level electric field input point subject to adverse effects of noise.
According to another aspect of the present invention, there is provided a method of displaying an input electric field level of a radio signal received by a radio receiver through an antenna on an input power level display using a conversion table which converts the input electric field level to a display value and is determined on the basis of two input electric field values under condition of which the receiver circuit is linearly operated, comprising the steps of: determining a corrected conversion table for correcting the nonlinearity of the conversion table for an input electric field under condition of which the receiver circuit is not linearly operated on the basis of the two input electric field values and a specified electric field value under condition of which the receiver circuit is not linearly operated; and displaying the display value corresponding to the input electric field using the corrected conversion table.
According to other aspect of the present invention, there is provided a method of displaying an input electric field level of a radio signal received by a radio receiver through an antenna on an input power level display using a conversion table which converts the input electric field level to a display value and is determined on the basis of two input electric field values under condition of which the receiver circuit is linearly operated, comprising the steps of: determining a corrected conversion table for correcting the non-linearity of the conversion table for an input electric field under condition of which the receiver circuit is not linearly operated on the basis of the two input electric field values and a specified electric field value under condition of which the receiver circuit is not linearly operated; judging whether the input electric field value is higher than the specified electric field value, selecting the conversion table or the corrected conversion table in accordance with the judged result; and displaying the display value corresponding to the input electric field using the corrected conversion table.
The specified field value is predetermined by means of experiments or circuit design. The specified electric field value corresponds to that of the time of saturation of the receiver circuit due to an high input power level electric field or the time of reception of a weak electric field subject to adverse effects of noise. The corrected conversion table is determined by an input of predetermined instruction.
Other objects and features will be clarified from the following description with reference to attached drawings.